1. Field of the Invention
The present invention relates in general to electronic circuits, particularly to Integrated Circuits (ICs). More specifically, the invention relates to the aspects of distributing electric quantities through an electronic circuit for local use, e.g., for use by circuit blocks as reference signals, such as reference voltages or currents.
2. Description of the Related Art
In electronic circuits, particularly in ICs, there is often the necessity of distributing through the IC electric quantities, such as voltages and/or currents, that are for example generated centrally, in a localized region of the IC, and which are exploited, e.g., as reference signals, locally to one or more circuit blocks in the IC, which are located more or less remotely from the generation site.
One example is the case of semiconductor memories. Some kinds of semiconductor memories, e.g., non-volatile memories such as ROMs, EPROMs, EEPROMs, and Flash memories, make use of reference voltages or currents or both for the operation of reading the data stored in the memory cells. Additionally, those non-volatile memories that are also electrically programmable use reference voltages or currents or both for the operation of verifying the data programmed into the memory cells.
These are mere examples, and the list of situations wherein reference electric quantities need to be generated and distributed through an electronic circuit, such as an IC, is very long.
The distribution of the reference voltages and currents is a critical aspect, especially in case of ICs of large size, which is more and more frequent, in consideration of the trend towards the increase of the integration scale.
For example, a reference voltage signal, which may be used by a circuit as such, or exploited for generating, by conversion, a reference current signal, is typically distributed through the IC by means of a metal line (for simplicity, a “metal”).
According to a first known solution, schematically depicted in FIG. 1, wherein reference numeral 100 is intended to identify a generic IC, e.g., a semiconductor memory such as a Flash memory, including a generator 105 of a reference voltage signal, the reference voltage, which is generated and distributed by means of a metal Vr, through the IC, is referred to an IC common reference electric potential, such as the common ground voltage, which is distributed through the IC by means of a metal GND (the common ground voltage typically is the electric potential to which the IC supply voltage VDD, distributed through the chip by means of a metal VDD, is referred); in this case, only one metal (the metal Vr) needs to be routed through the IC for distributing the reference voltage signal, from the generation site (i.e., the site in the IC where the reference voltage signal generator 105 is integrated) to the site or sites where the reference voltage is exploited, e.g., the circuit blocks 110a and 110b; for example, in case the IC is a non-volatile, electrically programmable memory, the circuit blocks 110a and 110b may be sense amplifier circuits or programming circuits, for sensing or programming the memory cells.
Due to the non-zero resistivity of the metals, currents injected into the common ground metal GND by the several circuit blocks of the IC, including currents I0 and I1 injected by the circuit blocks 110a and 110b exploiting the reference voltage signal (so-called self-induced disturbs), and currents injected into the common ground metal GND by any other circuit block of the IC, such as the current I2 injected by the circuit block 115 can disturb the value of the intended current or voltage or both. Any such current contributes to making the actual, local value of the common ground electric potential vary along the common ground metal GND. As a consequence, the actual value Vrif,a, Vrif,b of the reference voltage signal locally, at the circuit blocks 110a and 110b, differs from the reference voltage signal nominal value Vrif at the generation site. Such an effect can be reduced by properly dimensioning the IC metals, particularly by providing a relatively wide common ground metal GND, so as to reduce their resistivity, but there are semiconductor area and layout constraints to be respected that limit the possibility of widening the metal lines. Other sources of noise that may affect the actual local value of the reference voltage signal are for example fast switching digital signals, such as clock signals CLK, that, due to capacitive coupling, affect the local value of the common ground voltage, and thus the local actual value of the reference voltage signal.
In an alternative solution, schematically depicted in FIG. 2, yet at the generation site, the reference voltage signal may be referred to a dedicated reference electric potential, which is thus distributed through the IC alongside with the reference voltage signal by means of a dedicated reference electric potential metal GNDr, physically distinct from the metal GND that distributes, through the IC, the common ground. In this case, two metals are necessary for distributing the reference voltage signal from the generation site to the site of exploitation: one metal Vr for the reference voltage, and another metal GNDr for the dedicated reference electric potential, are in fact necessary for routing the reference voltage from the generation site to the site of exploitation (where the circuit blocks 110a, . . . , 110k are located). In this way, disturbances induced by currents injected into the common ground metal GND by circuit blocks (e.g., the circuit block 115) other than those exploiting the reference voltage are avoided, but the above-mentioned self-induced disturbances are still present. Additionally, while in an IC it is normally feasible to have a large metal GND for distributing the IC common ground potential, this is not the case for any dedicated reference potential metals GNDr, for which the area requirements are much stricter, and which are thus normally kept narrow.
In any case, the problem of having a reference electric quantity that, when distributed to different sites of the electronic circuit, changes its values with respect to the expected, nominal value, is a great problem in several applications.
Just to cite an example, let the case of a multi-level non-volatile semiconductor memory be considered, for example a multi-level Flash memory. In such a memory, each memory cell is adapted to store more than one bit of information, for example two bits, usually in terms of a plurality of (e.g., four or more) different values of the threshold voltage of a MOS transistor. The distance between the different threshold voltage values is small. In terms of current sunk by the memory cell, the memory cell currents that correspond to different threshold voltage values may differ from each other of a few microamperes. Thus, it is essential that the reference voltage(s) used to discriminate between the different threshold voltage values (or, dually, the reference current(s) used to discriminate between the different currents that may be sunk by the memory cell, depending on its programming state) is very precise. This is hardly achieved due to the disuniformity of the distributed reference voltage signal through the IC.
In view of the state of the art outlined in the foregoing, the Applicant has faced the problem of how to ensure that an electric quantity, such as a reference voltage/current signal, that has to be distributed through an electronic circuit, e.g., an IC, has, at a generic exploitation site in the IC, a value that substantially does not differ from the expected, nominal value, and that the value of such a distributed electric quantity is substantially uniform at different exploitation sites in the electronic circuit.